13.4 Consider the circuit in Fig. 13.1 with the device geometries shown at the bottom of this page. Let IREF = 40 µA, |Vt| for all devices = 0.45 V, μnCox = 390 µA/V2, μpCox = 70 µA/V2, |VA| for all devices = 5V, VDD = VSS = 1 V. Determine the size of Q6, W/L, that will ensure that the op amp will not have a systematic offset voltage. Then, for all devices, evaluate ID, |VOV|, |VGS|, gm, and ro. Provide your results in a table. Also find A1, A2, the power consumption, the dc open-loop voltage gain, the input common-mode range, and the output voltage range. Neglect the effect of VA on the bias currents.
13.4 Consider the circuit in Fig. 13.1 with the device geometries shown at the bottom of this page. Let IREF = 40 µA, |Vt| for all devices = 0.45 V, μnCox = 390 µA/V2, μpCox = 70 µA/V2, |VA| for all devices = 5V, VDD = VSS = 1 V. Determine the size of Q6, W/L, that will ensure that the op amp will not have a systematic offset voltage. Then, for all devices, evaluate ID, |VOV|, |VGS|, gm, and ro. Provide your results in a table. Also find A1, A2, the power consumption, the dc open-loop voltage gain, the input common-mode range, and the output voltage range. Neglect the effect of VA on the bias currents.
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