13.53 In the circuit of Fig. 13.22, Q1 and Q2 exhibit emitter–base breakdown at 7 V, while for Q3 and Q4 such a breakdown occurs at about 50 V. What differential input voltage would result in the breakdown of the input-stage transistors?
13.53 In the circuit of Fig. 13.22, Q1 and Q2 exhibit emitter–base breakdown at 7 V, while for Q3 and Q4 such a breakdown occurs at about 50 V. What differential input voltage would result in the breakdown of the input-stage transistors?
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