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Asked: 2023-07-23T08:45:18-04:00 In:

D 13.55 Consider the dc analysis of the 741 input stage shown in Fig. 13.23 for the situation in which IS6 = 2IS5. For IREF = 19 µA and assuming βP to be high, what does I become? Design a Widlar source to reestablish IC1 = IC2 = 9.5 µA using the circuit in Fig. 13.14 wherein all resistors and transistors are sized identically except Q1 in Fig. 13.14, whose emitter area is sized one-tenth that of the others.

Venkyelectrical
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D 13.55 Consider the dc analysis of the 741 input stage shown in Fig. 13.23 for the situation in which IS6 = 2IS5. For IREF = 19 µA and assuming βP to be high, what does I become? Design a Widlar source to reestablish IC1 = IC2 = 9.5 µA using the circuit in Fig. 13.14 wherein all resistors and transistors are sized identically except Q1 in Fig. 13.14, whose emitter area is sized one-tenth that of the others.

D 13.55 Consider the dc analysis of the 741 input stage shown in Fig. 13.23 for the situation in which IS6 = 2IS5. For IREF = 19 µA and assuming βP to be high, what does I become? Design a Widlar source to reestablish IC1 = IC2 = 9.5 µA using the circuit in Fig. 13.14 wherein all resistors and transistors are sized identically except Q1 in Fig. 13.14, whose emitter area is sized one-tenth that of the others.D 13.55 Consider the dc analysis of the 741 input stage shown in Fig. 13.23 for the situation in which IS6 = 2IS5. For IREF = 19 µA and assuming βP to be high, what does I become? Design a Widlar source to reestablish IC1 = IC2 = 9.5 µA using the circuit in Fig. 13.14 wherein all resistors and transistors are sized identically except Q1 in Fig. 13.14, whose emitter area is sized one-tenth that of the others.

microelectronics by sedra & smith chapter 13 questions

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