D 8.67 Design the circuit of Fig. 8.30 to provide an output current of 100 µA. Use VDD = 1.3 V, and assume the PMOS transistors to be identical and have μpCox = 128 µA/V2, Vtp = −0.4 V, and |VA| = 3 V. The current source is to have the widest possible signal swing at its output. Design for VOV = 0.15 V, and specify the values of the transistor W/L ratios and of VG3 and VG4. What is the highest allowable voltage at the output? What is the value of Ro?