D 8.7 The current-steering circuit of Fig. P8.7 is fabricated in a CMOS technology for which μnCox = 400 µA/V2, μpCox = 100 µA/V2, Vtn = 0.5 V, Vtp = −0.5 V, = 6 V/µm, and = 6 V/µm. If all devices have L = 0.5 µm, design the circuit so that IREF = 20 µA, I2 = 80 µA, I3 = I4 = 50 µA, and I5 = 100 µA. Use the minimum possible device widths needed to operate the current source Q2 with voltages at its drain as high as +0.8 V and to operate the current sink Q5 with voltages at its drain as low as –0.8 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q5.
D 8.7 The current-steering circuit of Fig. P8.7 is fabricated in a CMOS technology for which μnCox = 400 µA/V2, μpCox = 100 µA/V2, Vtn = 0.5 V, Vtp = −0.5 V, = 6 V/µm, and = 6 V/µm. If all devices have L = 0.5 µm, design the circuit so that IREF = 20 µA, I2 = 80 µA, I3 = I4 = 50 µA, and I5 = 100 µA. Use the minimum possible device widths needed to operate the current source Q2 with voltages at its drain as high as +0.8 V and to operate the current sink Q5 with voltages at its drain as low as –0.8 V. Specify the widths of all devices and the value of R. Find the output resistance of the current source Q2 and the output resistance of the current sink Q5.
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