D 9.109 The two-stage op amp in Figure P9.105 is fabricated in a 65-nm technology having = 540 µA/V2 and Vtn = −Vtp = 0.35 V. The amplifier is operated with VDD = +1.2 V and VSS = 0 V.
(a) Perform a dc design that will cause each of Q1, Q2, Q3, and Q4 to conduct a drain current of 200 µA and each of Q6 and Q7 to conduct a current of 400 µA. Design so that all transistors operate at 0.15-V overdrive voltages. Specify the W/L ratio required for each MOSFET. Present all results in a table.
(b) Find the input common-mode range.
(c) Find the allowable range of the output voltage.
(d) With vA = vid/2 and vB = −vid/2, find the voltage gain vo/vid. Assume an Early voltage of 2.4 V.