
D 8.41 The circuit in Fig. 8.15(a) is fabricated in the 0.13-µm CMOS process whose parameters are specified in Table K.1 (Appendix K). The supply voltage VDD = 1.3 V. The two transistors have L = 0.4 µm and are to be operated at ID = 100 µA and |VOV| = 0.15 V. Find the required values of VG, (W/L)1, (W/L)2, and Av. 0.75 V; 17.4; 69.4; −14.5 V/V
D 8.41 The circuit in Fig. 8.15(a) is fabricated in the 0.13-µm CMOS process whose parameters are specified in Table K.1 (Appendix K). The supply voltage VDD = 1.3 V. The two transistors have L = 0.4 µm and are to be operated at ID = 100 µA and |VOV| = 0.15 V. Find the required values of VG, (W/L)1, (W/L)2, and Av. 0.75 V; 17.4; 69.4; −14.5 V/V