12.55 A power MOSFET is specified to have IDmax = 5A, VDSmax = 50 V, and PDmax = 50 W. (a)Sketch the SOA boundaries. (b)If the MOSFET is used in the common-source configuration as shown in Fig. P12.55, show that the maximum ...
electricalstudent.com Latest Questions
12.54 The emitter follower in Fig. 12.3 drives a load resistance RL = 50 Ω with an output ranging between vO = ±5 V. It operates with VCC = 10 V and I = 200 mA. What is the peak ...
12.53 Consider the circuit in Fig. 12.24(b). If vA is a sine wave, what is the maximum power supplied to a load of resistance R, in terms of VDD?
12.52 A pulse waveform swinging between ±10 V has a duty ratio of 0.7. What is its average value? If the duty ratio is changed to 0.3, what does the average value become? +4 V; −4 V
12.51 Sketch waveforms resembling those in Fig. 12.24(a). Let vT have ±10 V peaks and assume vA is a sine wave with 5-V peak amplitude. Let the frequency of vT be 5 times that of vA. The comparator output levels ...
12.50 Design the circuit of Fig. 12.23 to drive a load resistance of 50 Ω while exhibiting an output resistance, around the quiescent point, of 2.5 Ω. Operate QN and QP at IQ = 1.5 mA and |VOV| = 0.15 ...
12.49 Show that in the CMOS class AB common-source output stage (Fig. 12.23), QN turns off when vO = 4IQRL and QP turns off when vO = −4IQRL. This is equivalent to saying that one of the transistors turns off ...
12.48 (a) Show that for the CMOS output stage of Fig. 12.23, assuming images the deviation of the gain from unity is
12.47 For the CMOS output stage of Fig. 12.23 with IQ = 1 mA, |VOV| = 0.2 V for each of QP and QN at the quiescent point, and μ = 5, find the output resistance at the quiescent point. 10
12.46 The class AB output stage in Fig. 12.23 utilizes two matched transistors with kn = kp = 250 mA/V2 and is operated from ±2.5-V power supplies. If the stage is required to supply a maximum current of ±20 mA ...