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Home/microelectronics by sedra and smith 8th edition chapter 14

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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.77 Design the circuit of Fig. 14.32(b) to realize, at the output of the second (noninverting) integrator, a maximally flat low-pass function with ω3dB = 104 rad/s and unity dc gain. Use a clock frequency fc = 200 kHz and select C1 = C2 = 2 pF. Give the values of C3, C4, C5, and C6. (Hint) 0.1 pF; 0.1 pF; 0.1414 pF; 0.1 pF

14.77 Design the circuit of Fig. 14.32(b) to realize, at the output of the second (noninverting) integrator, a maximally flat low-pass function with ω3dB = 104 rad/s and unity dc gain. Use a clock frequency fc = 200 kHz and ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.76 Repeat Exercise 14.24 for Q = 40.

14.76 Repeat Exercise 14.24 for Q = 40.

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.75 Repeat Exercise 14.24 for a clock frequency of 500 kHz.

14.75 Repeat Exercise 14.24 for a clock frequency of 500 kHz.  

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.74 For a dc voltage of 1 V applied to the input of the circuit of Fig. 14.30(b), in which C1 is 1 pF, what charge is transferred for each cycle of the two-phase clock? For a 200-kHz clock, what is the average current drawn from the input source? For a feedback capacitance of 10 pF, what change would you expect in the output for each cycle of the clock? For an amplifier that saturates at ±1 V and the feedback capacitor initially discharged, how many clock cycles would it take to saturate the amplifier? What is the average slope of the staircase output voltage produced?

14.74 For a dc voltage of 1 V applied to the input of the circuit of Fig. 14.30(b), in which C1 is 1 pF, what charge is transferred for each cycle of the two-phase clock? For a 200-kHz clock, what ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.73 For the switched-capacitor input circuit of Fig. 14.30(b), in which a clock frequency of 100 kHz is used, what input resistances correspond to capacitance C1 values of 0.1 pF, 0.5 pF, 1 pF, 5 pF, and 10 pF? 100 MΩ; 20 MΩ; 10 MΩ; 2 MΩ; 1 MΩ

14.73 For the switched-capacitor input circuit of Fig. 14.30(b), in which a clock frequency of 100 kHz is used, what input resistances correspond to capacitance C1 values of 0.1 pF, 0.5 pF, 1 pF, 5 pF, and 10 pF? 100 MΩ; ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.72 Design a fifth-order Butterworth low-pass filter that has a 3-dB bandwidth of 10 kHz and a dc gain of unity. Use the cascade connection of two circuits of the type shown in Fig. 14.29 and a first-order low-pass circuit (Fig. 14.8). Use a 10- kΩ value for all resistors. Second-order section: R1 = R2 = 10 kΩ, C3 = 492 pF, C4 = 5.15 nF; Second order section: R1 = R2 = 10 kΩ, C3 = 1.29 nF, C4 = 1.97 nF; First-order section: R1 = R2 = 10 kΩ, C = 1.59 nF

14.72 Design a fifth-order Butterworth low-pass filter that has a 3-dB bandwidth of 10 kHz and a dc gain of unity. Use the cascade connection of two circuits of the type shown in Fig. 14.29 and a first-order low-pass circuit ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.71 Use a cascade of the low-pass circuit in Fig. 14.29 and the high-pass circuit in Fig. 14.28(a) to realize a wide-band bandpass filter with 3-dB frequencies of 1 kHz and 100 kHz. The response of both circuits should be maximally flat; that is, each should have a Q of 0.707. Use capacitances in the nanofarad range. Sketch and label a Bode plot for the gain magnitude.

14.71 Use a cascade of the low-pass circuit in Fig. 14.29 and the high-pass circuit in Fig. 14.28(a) to realize a wide-band bandpass filter with 3-dB frequencies of 1 kHz and 100 kHz. The response of both circuits should be ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.70 Analyze the circuit in Fig. P14.70 to determine its transfer function T(s) ≡ Vo/Vi. Show that T(s) is that of a second-order bandpass filter and find ω0 and Q. For R1 = R2 = R, C4 = C, and C3 = C/m, find CR and m in terms of ω0 and Q. What center-frequency gain is obtained?

14.70 Analyze the circuit in Fig. P14.70 to determine its transfer function T(s) ≡ Vo/Vi. Show that T(s) is that of a second-order bandpass filter and find ω0 and Q. For R1 = R2 = R, C4 = C, and ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.69 Consider the bandpass circuit shown in Fig. 14.27(a). Let C1 = C2 = C, R3 = R, R4 = R/4Q2, and CR = 2Q/ω0. Disconnect the positive input terminal of the op amp from ground and apply Vi through a voltage divider R1, R2 to the positive input terminal as well as through R4 as before. Analyze the circuit to find its transfer function Vo/Vi. Find the ratio R2/R1 so that the circuit realizes a notch function.

14.69 Consider the bandpass circuit shown in Fig. 14.27(a). Let C1 = C2 = C, R3 = R, R4 = R/4Q2, and CR = 2Q/ω0. Disconnect the positive input terminal of the op amp from ground and apply Vi through ...

microelectronics by sedra and smith 8th edition chapter 14
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venkyelectrical
venkyelectrical
Asked: March 15, 2022In: microelectronics

14.68 Use the circuit in Fig. 14.27(a) to realize a bandpass filter with a center frequency of 10 kHz and a 3-dB bandwidth of 2.5 kHz. Give the values of all components and specify the center-frequency gain obtained. C1 = C2 = 10 nF, R3 = 12.73 kΩ, R4 = 200 Ω, gain = –32 V/V

14.68 Use the circuit in Fig. 14.27(a) to realize a bandpass filter with a center frequency of 10 kHz and a 3-dB bandwidth of 2.5 kHz. Give the values of all components and specify the center-frequency gain obtained. C1 = C2 ...

microelectronics by sedra and smith 8th edition chapter 14
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Recent Comments

  1. venkyelectrical on Bonus Problem (10 points): In this circuit, the op amp is IDEAL. The op amp is NOT operating in the linear region. In this Circuit, V+=V_. The op amp output saturates at +12v. The output is always at saturation, either positive or negative. The output will “toggle” as Vin crosses a “threshold” voltage. Because of the positive feedback, the threshold voltage changes depending on the state of the output voltage. Find the lower and upper values of the threshold voltages to 5 places of precision.
  2. venkyelectrical on Problem #3 Operational Amplifiers (35 pts): The op amp is IDEAL and operating in the linear region. Find the voltage gain (Av) of the circuit. If Vin = -2, find io.
  3. venkyelectrical on Problem #2 Operational Amplifiers (35 pts): Op amp is ideal and operating in the linear region. Find the node voltages in the table.
  4. venkyelectrical on Problem #I Linear Amplifiers (40 pts) (SHOW ALL WORK) In the Problem, all resistor values are in ohms, voltages are volts and currents are amps. Amp “A” is voltage-to-current, Amps “B” and “C” are current-to-voltage. Use /1 = 0.01(V1), v2 = 100(/2) and V3 = 50(/3). Use Vin shown in the table. Find all the values listed in the table. Hint: Observe that R3, R4 and R5 are m parallel.
  5. venkyelectrical on 3. This problem is on the quantization and encoding. Answer to the following: Assume round-off rule for uniform quantization. We have 10 samples from the analog signal and their quantization error qε are found to be distributed as, qε =[0.33, 0.36, -0.38, 0.22, -0.4, 0.07, 0.4, -0.18, -0.25, 0.38] (a) Decide the suitable value of quantization step size ∆. Give reasoning for your answer (3) (b) We assume that qε are uniformly distributed with its probability density function f ∆ (∆) =1 /∆ for the interval [-∆/2, +∆/2]. Calculate the quantization noise power Pqε for the value of ∆ you found in part (a). (3) (c) Per the quantization noise power you calculated in part (b), calculate the signal power S [Watt] if output Signal to Q-zation noise power ratio SNRo = 30 dB. (3) (d) If we encode the quantizer output with binary code with length ‘n’(integer), decide the minimum code length ‘n’ based on the condition given in part (c) (1)

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