17.16 A matched CMOS inverter fabricated in a process for which Cox = 25 fF/µm2, μnCox = 500 µA/V2, μpCox = 125 µA/V2, Vtn = |Vtp| = 0.35 V, and VDD = 1.0 V, uses Wn = 260 nm and Ln = Lp = 65 nm. The overlap capacitance and the effective drain-body capacitance per micrometer of gate width are 0.3 fF and 0.5 fF, respectively. The wiring capacitance is Cw = 2 fF. If the inverter is driving another identical inverter, find tPHL, tPLH, and tP. For how much additional capacitance load does the propagation delay increase by 50%?
tPHL = tPLH = tp = 7.7 ps; 3.16 fF;