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17.9For a process technology with L = 0.18 µm, n = 1.5, p = 3, give the sizes of all transistors in (a) a four-input NOR and (b) a four-input NAND. Also, give the relative areas of the two gates.
(a)NMOS devices: W/L = 0.27/0.18, PMOS devices: 2.16/0.18;
(b)NMOS devices: W/L = 1.08/0.18, PMOS devices: 0.54 /0.18; NOR area/NAND area = 1.5
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