a)Input this transfer function and draw the root locus of the system using the controlSystemDesigner function. Determine the gain to place closed loop poles near -0.5±2j. Hint: In controlSystemDesigner, you can drag poles, and this gain might be labelled “C”. Save your root locus plot as a ‘.png’ or 1.jpg’ and report your gain. b)Use controlSystemDesigner to plot the step response. By right clicking on the step response figure, determine the overshoot and settling time (under the “Characteristics” sub-menu). Report the overshoot settling time and damping ratio. c) Use controlSystemDesigner to add a PI compensator to improve the steady state error of the closed-loop system. Save your root locus plot as a 1.png’ or ‘.jpg’ and report your PI design. Is it possible to reduce both the steady state error and settling time? Hint: You can add zeros and poles using root locus editor.
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