D *7.8 Design the MOS amplifier of Fig. 7.4(a) to obtain maximum gain while allowing for an output voltage swing of at least ±0.2 V. Let VDD = 2 V, and use an overdrive voltage of approximately 0.2 V.
(a) Specify VDS at the bias point.
(b) What is the gain achieved? What is the signal amplitude that results in the 0.2-V signal amplitude at the output?
(c) If the dc bias current in the drain is to be 100 µA, what value of RD is needed?
(d) If = 400 µA/V2, what W/L ratio is required for the MOSFET?