D7.36 The bias arrangement of Fig. 7.55 is to be used for a common-base amplifier. Design the circuit to establish a dc emitter current of 1 mA and provide the highest possible voltage gain while allowing for a signal swing at the collector of ±2 V. Use +10-V and –5-V power supplies.
RB = 0; RE = 4.3 kΩ; RC = 8.4 kΩ
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