SIM 8.82 A particular cascoded NMOS current mirror, such as that shown in Fig. 8.36, is fabricated in the 0.18-µm CMOS process specified in Table K.1. All transistors have equal channel lengths L = 0.54µm. Width W1 = W4 = 2.7 µm, and W2 = W3 = 27 µm. The reference current IREF is 20 µA. What output current results? What are the voltages at the gates of Q2 and Q3? What is the lowest voltage at the output for which proper current-source operation is possible? What are the values of gm and ro of Q2 and Q3? What is the output resistance of the mirror?