D 8.94 If the pnp transistor in the circuit of Fig. P8.94 is characterized by its exponential relationship with a scale current IS, show that the dc current I is determined by IR = VT ln(I/IS). Assume Q1 and Q2 ...
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D 8.93 (a) For the circuit in Fig. P8.93, assume BJTs with high β and vBE = 0.7 V at 1 mA. Find the value of R that will result in IO = 10 µA. (b) For the design in (a), ...
D 8.92 (a) Utilizing a reference current of 200 µA, design a Widlar current source to provide an output current of 20 µA. Assume β to be high. (b) If β = 200 and VA = 50 V, find the value ...
8.91 Using the idea employed in the modified Wilson MOS mirror in Fig. 8.38(c), modify the Wilson BJT mirror of Fig. 8.37(a) to eliminate the systematic error resulting from the difference in VCE of Q1 and Q2.
8.90 Consider the Wilson MOS mirror of Fig. 8.88(a) for the case of all transistors identical, with W/L = 10, μnCox = 400 µA/V2, Vtn = 0.5 V, and VA = 18 V. The mirror is fed with IREF = ...
8.89 Show that the incremental input resistance (seen by IREF) for the Wilson MOS mirror of Fig. 8.38(a) is 2/gm. Assume that all three transistors are identical and neglect the Early effect. Also, assume a signal ground at the output. ...
8.88 The Wilson MOS mirror in Fig. 8.38(a) is fabricated in the 0.13-µm CMOS process specified in Table K.1. All three transistors are identical with channel length L = 4Lmin and W/L = 16. For IREF = 100 µA, find ...
*8.87 For the Wilson current mirror of Fig. 8.37(a), show that the incremental input resistance seen by IREF is approximately 2VT/IREF. (Neglect the Early effect in this derivation and assume a signal ground at the output.) Evaluate Rin for IREF ...
D 8.86 Use the pnp version of the Wilson current mirror to design a 0.1-mA current source. The current source is required to operate with the voltage at its output terminal as low as –1.5 V. If the power supplies ...
D 8.85 (a) The circuit in Fig. P8.85 is a modified version of the Wilson current mirror. Here the output transistor is “split” into two matched transistors, Q3 and Q4. Find IO1 and IO2 in terms of IREF. Assume all ...